Stanisław Staszic State University of Applied Sciences in Piła - Central Authentication System

Digital electronics

General data

Course ID:	ERASMUS>ELE04
Erasmus code / ISCED:	(unknown) / (unknown)
Course title:	Digital electronics
Name in Polish:	Digital electronics
Organizational unit:	Stanisław Staszic State University of Applied Sciences in Piła
Course groups:
ECTS credit allocation (and other scores):	(not available) Basic information on ECTS credits allocation principles: the annual hourly workload of the student’s work required to achieve the expected learning outcomes for a given stage is 1500-1800h, corresponding to 60 ECTS; the student’s weekly hourly workload is 45 h; 1 ECTS point corresponds to 25-30 hours of student work needed to achieve the assumed learning outcomes; weekly student workload necessary to achieve the assumed learning outcomes allows to obtain 1.5 ECTS; work required to pass the course, which has been assigned 3 ECTS, constitutes 10% of the semester student load. view allocation of credits
Language:	English
Full description:	1. Basic concepts of Boolean algebra, logical functions and methods of their presentation (description), minimization logic functions, rules of synthesis of combinational circuits. 2. Basic types and properties of logic gates. 3. R-S static (asynchronous) flip-flops, D, J-K, T dynamic (synchronous) flip-flops, monostable and astable flip-flops. 4. Parallel register, shift register, simple and reverse binary counters, BCD counters, meter capacity change. 5. Multiplexers and demultiplexers, coders and decoders. Combinational and sequential systems - differences in construction, examples. 6. Design of a given sequential system. 7. Development of a model of the designed system in a selected simulation program. 8. Simulation analysis of the designed system. 9. Selection of components from the catalogue and preparation of an assembly diagram. 10. Combination circuits (logic gates OR, AND, NOR, NAND, EXOR, NOT, characterization study NAND transition gate). 11. Flip-flops (RS, JK, frequency dividers using flip-flops). 12. Integrated registers - structure and principle of operation. 13. Combined synchronous and asynchronous counters.

Classes in period "Summer semester 2021/2022" (past)

Time span:	2022-02-21 - 2022-09-30	Selected timetable range: weekly course term Navigate to timetable
Type of class:	Final grade, 10 hours more information
Coordinators:	Paweł Szubert
Group instructors:	(unknown)
Students list:	(inaccessible to you)
Examination:	Final rating

Course descriptions are protected by copyright.
Copyright by Stanisław Staszic State University of Applied Sciences in Piła.